1. Field of the Invention
The present invention relates to a semiconductor device having a field effect transistor and a method of manufacturing thereof.
2. Description of the Prior Art
In general, a field effect transistor (hereinafter referred to as a "FET") using a compound semiconductor, such as GaAs and InP, utilizes its high electron mobility to be used as a high-frequency amplifier element in a microwave or millimeter wave range. In order to improve its high-frequency characteristic, it is most effective to shorten the length of its gate. Presently, an element having a gate length of less than 0.1 .mu.m is manufactured. In such a short-gate element, the resistance in a width direction of the gate increases as the length of the gate decreases. Therefore, in order to assure a greater sectional-area of the gate, a structure called T-gate having a mushroom-shaped or T-shaped cross-section is used as shown in FIG. 5.
The T-gate 37 comprises a stalk or foot portion 37.sub.1 and a cap or head portion 37.sub.2, and is formed on a GaAs substrate 1 via an AlGaAs layer 2. The stalk portion 37.sub.1, serves to determine the length 50 of a gate, and the cap portion 37.sub.2 serves to increase the sectional-area of the gate to prevent the increase of the resistance of the gate. Furthermore, a source electrode 39 and a drain electrode 40 are formed on a GaAs cap layer 3 provided on the AlGaAs layer 2.
Referring to FIGS. 6A to 6D, a conventional method for manufacturing a field effect transistor having such a T-gate structure will be described below.
First, an AlGaAs layer 2 and a GaAs cap layer 3 are sequentially formed on a GaAs substrate 1. Then, a PMMA (polymethyl acrylate) resist having a thickness of, e.g., 0.3 .mu.m, is applied on the GaAs substrate 1. This resist film is exposed to an electron beam and developed, so that a resist pattern 31 having an opening portion 32 of a length of, e.g., 0.1 .mu.m, is formed at a predetermined range (see FIG. 6A).
Then, a photo resist is applied to the resist pattern 31, aligned and developed, so that a pattern 33 of the photo resist having a reversely tapered opening of a width of, e.g., about 0.7 .mu.m, is formed at a region including the opening 32 (see FIG. 6B). Subsequently, the GaAs cap layer 3 exposed to the bottom surface of the resist pattern 31 is removed by the wet etching, so that an opening portion 34 of the gate is formed (see FIG. 6B).
Then, for example, a Mo layer of 0.03 .mu.m and Au layer of 0.4 .mu.m are evaporated and embedded in the opening portions 34 and 32 (see FIG. 6C). Then, the resist patterns 33 and 31 are dissolved to remove an unnecessary metal film 37a, so that a T-gate structure is formed (see FIG. 6D). Thereafter, a source electrode 39 and a drain electrode 40 are formed to complete the manufacturing of an field effect transistor.
In the aforementioned manufacturing method, the width of the bottom surface of the gate is 0.1 .mu.m which is minute. However, in the present circumstances, it is difficult to apply the optical alignment to a lithography of this level, so that the electron beam exposure is often applied thereto. However, according to the electron beam exposure, the throughput is too low for the mass production, so that the manufacturing costs are increased.
In addition, in the step of FIG, 6A, the cap layer 3 is etched using a resist having an opening width of 0.1 .mu.m and a thickness of 0.3 .mu.m, so that the aspect ratio is about 3. Thus, since the aspect ratio is high, the coverage of etching agent is poor, so that it is difficult to maintain the uniformity of etching. In addition, in the step of evaporating a gate metal, it is easy to produce a stepping or bench-cut 38 due to the high aspect ratio.
Due to such problems, it is difficult to develop the mass production of a high-performance FET having a T-gate structure.
As shown in FIG. 7, if the thickness of the resist 31a to be exposed to the electron beam is decreased to reduce the aspect ratio to the opening width, it is possible to solve the problem of being difficult to maintain the uniformity of etching and the problem of being easy to produce the stepping or bench-cut among the aforementioned problems. However, if the thickness of the resist 31a is decreased to reduce the height of the stalk portion, the distances between the gate and the source and drain are decreased, so that the parasitic capacities therebetween increase. In particular, the capacity between gate and drain is determined by the fringe capacity of the gate, and the cap portion 37.sub.2 accounts for the majority of the fringe capacity 45 in the T-gate structure as shown in FIG. 8. Therefore, there is a problem in that the high-frequency characteristic deteriorates when the height of the stalk portion 37.sub.1 decreases.